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VHDL OPERATORS

Every language has operators whose functions are to operate on operands and produce some results. A subset of VHDL operators can be grouped as follows:
    Assignment Operators
    Shift Operators
    Logical Operators
    Relational Operators
    Arithmetic Operators
    Misc Operators
ASSIGNMENT OPERATORS
<= Signal assignment:
<target_identifier> <= <expression>
Ex: c <= a NAND b;
To initialise the signal use ':=', ex:
Signal Enable: Bit := '0';
:= Constant and variable assignments:
<target_identifier> := <expression>
Ex: Constant a: a_type := "1001";
      Variable temp_a : integer;
      temp_a := a;
SHIFT OPERATOR
SLL

SRL

SLA
SRA
ROL
ROR
Shift left, right most bits replaced with zeros
Shift right, left most bits replaced with zeros
Shift left arithmetic
Shift right arithmetic
Rotate left
Rotate Right
Examples:
"1001" sll 2 => 0100, "1001" srl 2 => 0010
"0101" sla 2 => 0111, "1010" sra 2 => 1110
"0111" rol 2 => 1101, "1011" ror 2 => 1110
LOGICAL OPERATORS
AND
OR
NAND
NOR
XOR
XNOR
NOT
Logical operators work on predefined types, either Bit or Boolean. The resul has the same type as the type of operand(s).
Ex: z := x AND y;     -- variables
      c <= a AND b;   -- signals
RELATIONAL OPERATORS
 =           eq
/=     not eq
 <             lt
 <=  lt or eq
 >             gt
 >= gr or eq
Relational operators compare two operands of the same type and produce a Boolean type.
Ex: z <= x <= y;
-- If x less than or equal to y, the Boolean result will be assigned to the signal z.
ARITHMETIC OPERATORS
**
rem
mod
/
*
-
+
abs
-
+
Exponentiation
Remainder
Modulus
Division
Multiplication
Subtraction
Addition
Absolute Value
Unary Minus
Unary Plus
MISCELLANEOUS OPERATORS
& Concatenation operator
Example:
"ABC" & "DEF" => ABCDEF
"1010" & "0101" => 10100101

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